1. Field of the Invention
The present disclosure relates generally to a phase lock loop (PLL) and, more particularly, to a voltage controlled oscillator and a PLL having the same.
A claim of priority is made under 35 U.S.C. §119 to Korean Patent Application 10-2006-0112556, filed on Nov. 15, 2006, the contents of which are hereby incorporated by reference in their entirety.
2. Description of the Related Art
A phase lock loop (PLL) circuit is generally used as a circuit for synchronizing signals. These synchronized signals may then be used in a variety of electronic applications such as, for example, computers, radios, telecommunications equipment, and other such applications where it is desirable to stabilize a generated signal, or detect noise. Thus, PLL circuits have been extensively used in devices such as, for example, frequency synthesizers, FM demodulators, clock recovery circuits, Modems, and tone decoders.
Most PLL circuits include a voltage controlled oscillator (VCO). The VCO generally provides an output voltage via a feedback loop that is compared with the reference voltage provided to the PLL circuit. Furthermore, depending on the application, either the output of the VCO, or a control signal to the VCO, provides the useful output of the PLL system.
In particular, the PLL circuit generates a target frequency by using a VCO to generate an oscillation frequency. The VCO generates this oscillation frequency based on a control voltage applied to the VCO. However, the control voltage applied to the VCO reacts sensitively to even a small change of input frequency. The change of input frequency may be due to undesirable factors such as, for example, noise. The change in control voltage to the VCO may affect the output frequency of the VCO by causing undesirable effects such as jitter in the output frequency. This jitter in the output frequency may in turn affect the performance of the PLL that receives the output signal of the VCO as in input signal.
As described above, the performance of a VCO may affect the entire performance of the PLL circuit. In order to enhance a performance of the PLL circuit, the VCO should beneficially be small in gain, operate only in a required frequency band, and be insensitive to noise.
Different types of VCOs are used in the industry. For example, FIGS. 1 and 2 illustrate a VCO that is made up by linking a number of inverters to form an inverter chain. Referring to FIG. 1, the VCO includes a plurality of inverters 10 that are connected with each other to form an inverter chain. In particular, the inverter chain includes a plurality of inverters 10 connected in cascade. Furthermore, plural current sources may be used to control current flowing through the plurality of inverters.
An inverter circuit 10 constituting the inverter chain is illustrated in FIG. 2. With reference to FIG. 2, the inverter circuit 10 of the inverter chain includes a PMOS transistor P10 configured as a pull-up element and an NMOS transistor N10 configured as a pull-down element. In addition, a load L10 may be connected between a power source voltage (VDD) terminal and the PMOS transistor P10. Furthermore, current sources 12 each are configured to control current provided to a pull-up element P10 and a pull-down element N10 of each inverter circuit 10.
Generally, as shown in FIG. 2, the current sources 12 are provided using NMOS transistors N12 and N14. Transistors N12 and N14 are connected between one end of the pull-down element N10 and ground. Furthermore, as also shown in FIG. 2, the current sources are controlled by voltages VCC and VCF. Specifically, Vcc is known as a coarse voltage and VCF is known as a fine voltage. The coarse voltage Vcc and the fine voltage VCF are each provided in common to the inverter chain.
The coarse voltage Vcc is to perform a coarse tuning for a voltage control of the VCO, and the fine voltage VCF is to perform a fine tuning. Primarily the coarse tuning is performed to reach a target frequency area, and then the fine tuning is performed to generate the target frequency. This process will now be described in FIG. 3.
FIG. 3 is a graph illustrating the relation between an output frequency of a VCO and an input voltage provided to the VCO. The X-axis indicates voltage, and the Y-axis indicates frequency. As shown in FIG. 3, the coarse tuning is performed first. During the coarse tuning, the coarse voltage Vcc is changed within a range of 0 V to power source voltage VDD. Furthermore, the coarse tuning is performed until the output frequency of the VCO reaches close to a target frequency Ftarget. When the output frequency of the VCO reaches close to the target frequency Ftarget, the coarse voltage Vcc is fixed. Then, the fine tuning is performed.
The fine tuning is performed by changing the fine voltage VCF within a range of 0V to power source voltage VDD. Then, when the output frequency of the VCO exactly coincides with the target frequency Ftarget, the fine voltage VCF is fixed.
As described above, jitter in the VCO and the PLL may be reduced by using a combination of coarse tuning and fine tuning However, this process suffers from a number of problems. For example, as shown in FIG. 3, a gain Kvco1 of the VCO is large. This large gain Kvco1 of the VCO may cause a large change in frequency for even a slight variation in the control voltage. This high level of sensitivity of the VCO may affect the overall performance of the PLL circuit using the VCO because of problems such as, for example, increased jitter.
The present disclosure is directed towards overcoming one or more shortcomings associated with the conventional VCO and PLL circuits employing the same.